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| work.acia6850 | Synthesizable 6850 compatible ACIA | |
| rtl | ||
| work.ACIA_6850 | 6850 ACIA core | |
| rtl | Architecture for ACIA_6850 Interface registers | |
| work.acia_clock | Synthesizable Baud Rate Clock Divider | |
| rtl | Architecture for ACIA_Clock | |
| work.ACIA_RX | ||
| rtl | ||
| work.ACIA_TX | ||
| rtl | ||
| work.char_rom | Character Generator | |
| rtl | ||
| work.clock_div | Clock divider for System09 | |
| RTL | ||
| work.clock_dll | Synthesible System Clock Divider for Xilinx Spartan 3 | |
| RTL | ||
| work.cpu09 | Synthesizable 6809 instruction compatible VHDL CPU core | |
| rtl | ||
| work.dat_ram | Synthesizable SWTPc 6809 Dynamic Address Translation Table | |
| rtl | ||
| work.dma6844 | Synthesizable 6844 Compatible DMA Controller | |
| rtl | ||
| work.dualport | Dual-port front-end for SDRAM controller. | |
| arch | ||
| work.epp | Synthesizable Enhance Parallel Port | |
| rtl | ||
| work.flasher | LED Flasher | |
| rtl | ||
| work.flex_ram | Flex9 O/S Initialised 8KByte RAM | |
| rtl | Flex9 O/S Initialised 8KByte RAM | |
| work.ioport | Synthesizable Dual Bidirectionsal I/O Port | |
| rtl | ||
| work.keyboard | Synthesizable Interface to PS/2 Keyboard Module | |
| rtl | ||
| work.keymap_rom | Synthesizable PS/2 Keyboard Key map ROM for Spartan3 | |
| rtl | Synthesizable PS/2 Keyboard Key map ROM for Spartan3 | |
| work.maisforth_rom_16k | Mais Forth 16K ROM for the 6809 | |
| rtl | Mais Forth 16K ROM for the 6809 | |
| work.mon_rom | ROM with SYS09BUG Monitor Program | |
| rtl | ROM with SYS09BUG Monitor Program | |
| work.mul32 | Synthesizable 32 bit Multiplier Register for Spartan 3/3E | |
| rtl | ||
| work.my_system09 | Top level file for 6809 compatible system on a chip | |
| rtl | ||
| work.peripheral_bus | Peripheral Bus Interface | |
| rtl | ||
| work.pia6821 | Synthesizable 6821 Compatible Parallel Interface Adapter | |
| pia_arch | ||
| work.pia_timer | Synthesizable Parallel Interface Adapter with Timer | |
| pia_arch | ||
| work.priority_rot | Synthesizable Rotating Priority Encoder | |
| rtl | ||
| work.ps2_keyboard | Synthesizable PS/2 Keyboard Interface | |
| rtl | Implements a PS/2 Keyboard Interface | |
| work.quadcpu09 | Synthesizable Quad Core 6809 instruction compatible CPU Module | |
| RTL | Top level file for quad Core 6809 compatible system on a chip | |
| work.ram_24k | 24K Block RAM | |
| rtl | 24K Block RAM | |
| work.ram_2k | 2K Block RAM | |
| rtl | 2K Block RAM | |
| work.ram_32k | 32K Block RAM | |
| rtl | 32K Block RAM | |
| work.rom_8k | Trace bug ROM | |
| rtl | Trace bug ROM | |
| work.sdramCntl | SDRAM controller | |
| arch | ||
| work.seven_segment | Synthesizable Multiplex Seven Segment LED Driver | |
| rtl | ||
| work.SevenSegmentDisplay | ||
| Behavioral | ||
| work.spi_master | Synthesizable Serial Peripheral Interface Master | |
| rtl | Implements a SPI Master Controller | |
| work.spp | Synthesizable Simple Parallel Port | |
| rtl | Implements a Simple Parallel Port for System09 | |
| work.SYS09BUG_F800 | Sys09 bug ROM | |
| rtl | Sys09 bug ROM | |
| work.timer | Synthesizable 8 bit Timer | |
| rtl | ||
| work.trace | Synthesizable Hardware Trace Capture | |
| trace_arch | Implements a hardware real-time trace buffer for system09. | |
| work.trap | Synthesizable Hardware Breakpoint Trap | |
| trap_arch | ||
| work.twi | Syntheziable VHDL two wire interface | |
| rtl | Implements an I2C master Interface | |
| work.unicpu09 | Synthesizable Single 6809 Instruction Compatible CPU Module | |
| RTL | ||
| work.vdu8 | Synthesizable Colour Video Display Unit for System09 | |
| RTL | Implements a text based Colour Video Display Unit for System09 | |
| work.vdu8_mono | Synthesizable Monochrome Video Display Unit for System09 | |
| RTL | Implements a text based Monochrome Video Display Unit for System09 | |
| work.XSASDRAMCntl | ||
| arch | Customizes the generic SDRAM controller module for the XSA Board. | |