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Synthesizable 32 bit Multiplier Register for Spartan 3/3E
Defined in VHDL/mul32.vhd
Author: John E. Kent
Version: 0.2 from 2010-06-17
| library ieee | |
| use ieee.std_logic_1164.all | |
| use ieee.std_logic_unsigned.all | |
| library unisim | |
| use unisim.vcomponents.all |
| clk | in | std_logic |
| rst | in | std_logic |
| cs | in | std_logic |
| rw | in | std_logic |
| addr | in | std_logic_vector(3 downto 0) |
| dati | in | std_logic_vector(7 downto 0) |
| dato | out | std_logic_vector(7 downto 0) |