| clk |
in | std_logic |
| host side |
| bufclk |
out | std_logic |
| host side |
| clk1x |
out | std_logic |
| host side |
| clk2x |
out | std_logic |
| host side |
| lock |
out | std_logic |
| host side |
| rst |
in | std_logic |
| host side |
| rd |
in | std_logic |
| host side |
| wr |
in | std_logic |
| host side |
| earlyOpBegun |
out | std_logic |
| host side |
| opBegun |
out | std_logic |
| host side |
| rdPending |
out | std_logic |
| host side |
| done |
out | std_logic |
| host side |
| rdDone |
out | std_logic |
| host side |
| hAddr |
in | std_logic_vector(HADDR_WIDTH-1 downto 0) |
| host side |
| hDIn |
in | std_logic_vector(DATA_WIDTH-1 downto 0) |
| host side |
| hDOut |
out | std_logic_vector(DATA_WIDTH-1 downto 0) |
| host side |
| status |
out | std_logic_vector(3 downto 0) |
| host side |
| sclkfb |
in | std_logic |
| SDRAM side |
| sclk |
out | std_logic |
| SDRAM side |
| cke |
out | std_logic |
| SDRAM side |
| cs_n |
out | std_logic |
| SDRAM side |
| ras_n |
out | std_logic |
| SDRAM side |
| cas_n |
out | std_logic |
| SDRAM side |
| we_n |
out | std_logic |
| SDRAM side |
| ba |
out | std_logic_vector(1 downto 0) |
| SDRAM side |
| sAddr |
out | std_logic_vector(SADDR_WIDTH-1 downto 0) |
| SDRAM side |
| sData |
inout | std_logic_vector(DATA_WIDTH-1 downto 0) |
| SDRAM side |
| dqmh |
out | std_logic |
| SDRAM side |
| dqml |
out | std_logic |
| SDRAM side |