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Entity work.SevenSegmentDisplay

Defined in VHDL/SevenSegmentDisplay.vhd

Architectures

Behavioral


Libraries and global use clauses

library IEEE
use IEEE.STD_LOGIC_1164.ALL
use IEEE.STD_LOGIC_ARITH.ALL
use IEEE.STD_LOGIC_UNSIGNED.ALL

Ports

Clk instd_logic
Reset instd_logic
Value0 instd_logic_vector(3 downto 0)
Value1 instd_logic_vector(3 downto 0)
Value2 instd_logic_vector(3 downto 0)
Value3 instd_logic_vector(3 downto 0)
DPs instd_logic_vector(3 downto 0)
Blanks instd_logic_vector(3 downto 0)
DigitSelect outstd_logic_vector(3 downto 0)
Segments outstd_logic_vector(7 downto 0)

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