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Peripheral Bus Interface
Defined in VHDL/peripheral_bus.vhd
Author: John E. Kent
Version: 0.1 from 2010-08-28
| library ieee | |
| use ieee.numeric_std.all | |
| use ieee.std_logic_1164.all | |
| use ieee.std_logic_unsigned.all |
| clk | in | std_logic | |
| CPU Interface signals | |||
| rst | in | std_logic | |
| CPU Interface signals | |||
| cs | in | std_logic | |
| CPU Interface signals | |||
| addr | in | std_logic_vector(7 downto 0) | |
| CPU Interface signals | |||
| rw | in | std_logic | |
| CPU Interface signals | |||
| data_in | in | std_logic_vector(7 downto 0) | |
| CPU Interface signals | |||
| data_out | out | std_logic_vector(7 downto 0) | |
| CPU Interface signals | |||
| hold | out | std_logic | |
| CPU Interface signals | |||
| pb_rd_n | out | std_logic | |
| Peripheral Bus Interface Signals. IO + ($00 - $FF) (for compatibility with XSA-3S1000 / XST 3.0) | |||
| pb_wr_n | out | std_logic | |
| Peripheral Bus Interface Signals. IO + ($00 - $FF) (for compatibility with XSA-3S1000 / XST 3.0) | |||
| pb_addr | out | std_logic_vector( 4 downto 0) | |
| Peripheral Bus Interface Signals. IO + ($00 - $FF) (for compatibility with XSA-3S1000 / XST 3.0) | |||
| pb_data | inout | std_logic_vector(15 downto 0) | |
| Peripheral Bus Interface Signals. IO + ($00 - $FF) (for compatibility with XSA-3S1000 / XST 3.0) | |||
| ide_cs | out | std_logic | |
| Peripheral chip selects on Peripheral Bus | |||
| eth_cs | out | std_logic | |
| Peripheral chip selects on Peripheral Bus | |||
| sl1_cs | out | std_logic | |
| Peripheral chip selects on Peripheral Bus | |||
| sl2_cs | out | std_logic | |
| Peripheral chip selects on Peripheral Bus | |||