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Defined in VHDL/SevenSegment.vhd
Author: John E. Kent
Version: 0.3 from 31 May 2010
4 x 8 bit lathes to display 7 segments.
Multiplexes segment registers across 4 displays.
For use on the Digilent Spartan 3 Starter Board.
| library ieee | |
| use ieee.std_logic_1164.all | |
| use ieee.std_logic_unsigned.all | |
| library unisim | |
| use unisim.vcomponents.all |
| seg_write ( clk, rst, addr, cs, rw, data_in ) | ||||
| seg_read ( addr, seg_reg0, seg_reg1, seg_reg2, seg_reg3 ) | ||||
| Read Segment registers | ||||
| seg_out ( rst, Clk) | ||||
| Output Segment registers | ||||