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Entity work.pia6821

Synthesizable 6821 Compatible Parallel Interface Adapter

Defined in VHDL/pia6821.vhd

Author: John E. Kent
Version: 0.2 from 2010-08-09

Architectures

pia_arch


Libraries and global use clauses

library ieee
use ieee.std_logic_1164.all
use ieee.std_logic_unsigned.all

Ports

clk instd_logic
rst instd_logic
cs instd_logic
rw instd_logic
addr instd_logic_vector(1 downto 0)
data_in instd_logic_vector(7 downto 0)
data_out outstd_logic_vector(7 downto 0)
irqa outstd_logic
irqb outstd_logic
pa inoutstd_logic_vector(7 downto 0)
ca1 instd_logic
ca2 inoutstd_logic
pb inoutstd_logic_vector(7 downto 0)
cb1 instd_logic
cb2 inoutstd_logic

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