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Flex9 O/S Initialised 8KByte RAM
Defined in Spartan3/flex9_ram8k_b16.vhd
Author: John Kent
Version: 1.0 from 22 December 2006
library IEEE | |
use IEEE.STD_LOGIC_1164.ALL | |
use IEEE.STD_LOGIC_ARITH.ALL | |
library unisim | |
use unisim.vcomponents.all |
clk | in | std_logic |
rst | in | std_logic |
cs | in | std_logic |
rw | in | std_logic |
addr | in | std_logic_vector (12 downto 0) |
rdata | out | std_logic_vector (7 downto 0) |
wdata | in | std_logic_vector (7 downto 0) |