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Entity work.flex_ram

Flex9 O/S Initialised 8KByte RAM

Defined in Spartan3/flex9_ram8k_b16.vhd

Author: John Kent
Version: 1.0 from 22 December 2006

Architectures

rtl

Instantiated in...

work.my_system09 (rtl)

Libraries and global use clauses

library IEEE
use IEEE.STD_LOGIC_1164.ALL
use IEEE.STD_LOGIC_ARITH.ALL
library unisim
use unisim.vcomponents.all

Ports

clk instd_logic
rst instd_logic
cs instd_logic
rw instd_logic
addr instd_logic_vector (12 downto 0)
rdata outstd_logic_vector (7 downto 0)
wdata instd_logic_vector (7 downto 0)

Generated on 1 Jan 2018 19:48:42 with VHDocL V0.2.6